The present invention relates generally to integrated circuits, and, more particularly, to decoupling capacitors in integrated circuits.
Decoupling capacitors (decaps) are used in integrated circuit (IC) design to filter out noise coupling between a positive supply voltage (Vdd) and a complimentary lower supply voltage (Vss). Such power noises are caused by transistors in a high density IC demanding high current at high frequencies, which results in abrupt voltage drops. There can be both global and localized voltage drops on the power grid of the IC. This voltage drop can be reduced by providing localized sources of current, such as capacitors, which decouple current surges from the power grid, and thereby reduce noise on the power grid.
One type of on-die capacitor is called a MOS-C or metal oxide semiconductor capacitor. The MOS-C has two terminals separated by a gate oxide. One of the terminals is the gate and the other is the body. Another type of on-die capacitor is using a field effect transistor (FET) such as an n-channel metal oxide semiconductor FET (NMOSFET) or a p-channel metal oxide semiconductor FET (PMOSFET). One of the terminals is the gate and the other terminal is the source, drain, and body. The terminals are separated by a gate oxide. One common feature in these two types of on-die capacitor is to use gate oxide as dielectric material, which suffers high leakage current tunneling through the gate oxide, especially in modern semiconductor devices where gate oxide is becoming ever thinner. Gate oxide directly connect to the Vdd is also prone to electrostatic discharge (ESD) damage.
What is desired is a low leakage decap with flexibility in formation and robust to damages.